1. Field of the Invention
The present invention relates to a magnetic random access memory. More particularly, the present invention relates to a magnetic random access memory where a current of (I(H)+I(L))/2 flows to a reference cell irrespective of a bitline clamp voltage.
2. Description of the Related Art
Magnetic random access memory (MRAM) is a kind of a non-volatile memory device including a plurality of magnetic memory cells. The MRAM utilizes a magnetoresistive effect occurring between a magnetic layer and an amagnetic layer, which constitute a multiple layer (bi-layer). When magnetization directions in the magnetic layer are identical to each other (parallel state), the magnetic resistance of a magnetic memory cell is minimal. When magnetization directions in the magnetic layer are opposite to each other (anti-parallel state), the magnetic resistance of a magnetic memory cell is maximal. The parallel state is called a logic low (“L”) state, and the anti-parallel state is called a logic high (“H”) state.
To read a logic state stored in the magnetic memory cell, the MRAM applies a sense current and a reference current to a target cell and a reference cell, respectively. A voltage drop arises at both ends of cells according to magnetic resistance values of the target cell and the reference cell. These voltages are compared with each other to determine a state of the target cell. In order to precisely compare the target cell with the reference cell, there is a demand for a magnetic memory cell having no variation in the magnetic resistance. Generally, a current of (I(H)+I(L))/2 flows to the reference cell.
FIG. 1 illustrates a 32 Kb MRAM memory block with a mid-point reference generator of the prior art. The mid-point reference generator has four magnetic resistors that are connected in series-parallel. One serially connected magnetic resistor is connected in parallel with another serially connected magnetic resistor, so that it becomes a resistor having a value of (Rmax+Rmin)/2. A magnetic resistor value of the mid-point reference generator is variable with the level of a bitline clamp voltage Vref, which will be explained below with reference to FIG. 2.
Referring to FIG. 2, a difference between a maximum resistor Rmax and a minimum resistor Rmin when a bitline clamp voltage Vref is equal to a voltage having a set value is smaller than a difference between the maximum resistor Rmax and the minimum resistor Rmin when the bitline clamp voltage Vref is lower than the voltage having the set value. That is, if the bitline clamp voltage Vref is high, the resistor value “(Rmax+Rmin)/2” becomes small. If the bitline clamp voltage Vref is low, the resistor value “(Rmax+Rmin)/2” becomes large. Thus, the mid-point reference generator should regulate the reference voltage Vref to set the resistor value “(Rmax+Rmin)/2”. The reference voltage Vref is regulated only by an experimental result, and requires reconstruction of the bitline clamp voltage of a reference cell. As a result, a read operation of the magnetic memory cell becomes unstable.